Magnetic random-access memory (MRAM) is poised to replace traditional computer memory based on complementary metal-oxide semiconductors (CMOS). MRAM will surpass all other types of memory devices in terms of nonvolatility, low energy dissipation, fast switching speed, radiation hardness, and durability. Although toggle-MRAM is currently a commercial product, it is clear that future developments in MRAM will be based on spin-transfer torque, which makes use of electrons’ spin angular momentum instead of their charge. MRAM will require an amalgamation of magnetics and microelectronics technologies. However, researchers and developers in magnetics and in microelectronics attend different technical conferences, publish in different journals, use different tools, and have different backgrounds in condensed-matter physics, electrical engineering, and materials science.

This book is an introduction to MRAM for microelectronics engineers written by specialists in magnetic materials and devices. It presents the basic phenomena involved in MRAM, the materials and film stacks being used, the basic principles of the various types of MRAM (toggle and spin-transfer torque; magnetized in-plane or perpendicular-to-plane), the back-end magnetic technology, and recent developments toward logic-in-memory architectures. It helps bridge the cultural gap between the microelectronics and magnetics communities.

Bernard Dieny has conducted research in magnetism for 30 years. He played a key role in the pioneering work on spin-valves at IBM Almaden Research Center in 1990-1991. In 2001, he co-founded SPINTEC in Grenoble, France, a public research laboratory devoted to spin-electronic phenomena and components. Dieny is co-inventor of 70 patents and has co-authored more than 340 scientific publications. He received an outstanding achievement award from IBM in 1992 for the development of spin-valves, the European Descartes Prize for Research in 2006, and two Advanced Research Grants from the European Research Council in 2009 and 2015. He is co-founder of two companies, one dedicated to magnetic random-access memory, Crocus Technology, the other to the design of hybrid CMOS/magnetic circuits, EVADERIS. In 2011 he was elected Fellow of the Institute of Electrical and Electronics Engineers.

Ronald B. Goldfarb was leader of the Magnetics Group at the National Institute of Standards and Technology in Boulder, Colorado, USA, from 2000 to 2015. He has published over 60 papers, book chapters, and encyclopedia articles in the areas of magnetic measurements, superconductor characterization, and instrumentation. In 2004 he was elected Fellow of the Institute of Electrical and Electronics Engineers (IEEE). From 1995 to 2004 he was editor in chief of IEEE Transactions on Magnetics. He is the founder and chief editor of IEEE Magnetics Letters, established in 2010. He received the IEEE Magnetics Society Distinguished Service Award in 2016.

Kyung-Jin Lee is a professor in the Department of Materials Science and Engineering, and an adjunct professor of the KU-KIST Graduate School of Converging Science and Technology, at Korea University. Before joining the university, he worked for Samsung Advanced Institute of Technology in the areas of magnetic recording and magnetic random-access memory. His current research is focused on understanding the underlying physics of current-induced magnetic excitations and exploring new spintronic devices utilizing spin-transfer torque. He is co-inventor of 20 patents and has more than 100 scientific publications in the areas of magnetic random-access memory, spin-transfer torque, and spin-orbit torques. He received an outstanding patent award from the Korea Patent Office in 2005 and an award for Excellent Research on Basic Science from the Korean government in 2010. In 2013 he was recognized by the National Academy of Engineering of Korea as a leading scientist in spintronics, "one of the top 100 technologies of the future."

ABOUT THE EDITORS xi

PREFACE xiii

CHAPTER 1 BASIC SPINTRONIC TRANSPORT PHENOMENA 1

Nicolas Locatelli and Vincent Cros

1.1 Giant Magnetoresistance 2

1.2 Tunneling Magnetoresistance 9

1.3 The Spin-Transfer Phenomenon 20

CHAPTER 2 MAGNETIC PROPERTIES OF MATERIALS FOR MRAM 29

Shinji Yuasa

2.1 Magnetic Tunnel Junctions for MRAM 29

2.2 Magnetic Materials and Magnetic Properties 31

2.3 Basic Materials and Magnetotransport Properties 39

CHAPTER 3 MICROMAGNETISM APPLIED TO MAGNETIC NANOSTRUCTURES 55

Liliana D. Buda-Prejbeanu

3.1 Micromagnetic Theory: From Basic Concepts Toward the Equations 55

3.2 Micromagnetic Configurations in Magnetic Circular Dots 67

3.3 STT-Induced Magnetization Switching: Comparison of Macrospin and Micromagnetism 70

3.4 Example of Magnetization Precessional STT Switching: Role of Dipolar Coupling 73

CHAPTER 4 MAGNETIZATION DYNAMICS 79

William E. Bailey

4.1 Landau-Lifshitz-Gilbert Equation 79

4.2 Small-Angle Magnetization Dynamics 84

4.3 Large-Angle Dynamics: Switching 90

4.4 Magnetization Switching by Spin-Transfer 95

CHAPTER 5 MAGNETIC RANDOM-ACCESS MEMORY 101

Bernard Dieny and I. Lucian Prejbeanu

5.1 Introduction to Magnetic Random-Access Memory (MRAM) 101

5.2 Storage Function: MRAM Retention 104

5.3 Read Function 110

5.4 Field-Written MRAM (FIMS-MRAM) 112

5.5 Spin-Transfer Torque MRAM (STT-MRAM) 118

5.6 Thermally-Assisted MRAM (TA-MRAM) 135

5.7 Three-Terminal MRAM Devices 150

5.8 Comparison of MRAM with Other Nonvolatile Memory Technologies 153

5.9 Conclusion 157

CHAPTER 6 MAGNETIC BACK-END TECHNOLOGY 165

Michael C. Gaidis

6.1 Magnetoresistive Random-Access Memory (MRAM) Basics 165

6.2 MRAM Back-End-of-Line Structures 166

6.3 MRAM Process Integration 169

6.4 Process Characterization 187

CHAPTER 7 BEYOND MRAM: NONVOLATILE LOGIC-IN-MEMORY VLSI 199

Takahiro Hanyu, Tetsuo Endoh, Shoji Ikeda, Tadahiko Sugibayashi, Naoki Kasai, Daisuke Suzuki, Masanori Natsui, Hiroki Koike, and Hideo Ohno

7.1 Introduction 199

7.2 Nonvolatile Logic-in-Memory Architecture 203

7.3 Circuit Scheme for Logic-in-Memory Architecture Based on Magnetic Flip-Flop Circuits 209

7.4 Nonvolatile Full Adder Using MTJ Devices in Combination with MOS Transistors 214

7.5 Content-Addressable Memory 217

7.6 MTJ-based Nonvolatile Field-Programmable Gate Array 224

APPENDIX 231

INDEX 233